The present invention is directed to monolithic integrated circuits, and in particular to the characteristics of p-type regions in integrated circuit devices.
In the design of integrated circuit devices, regions of one type of electrical activity are formed in or adjacent to regions that exhibit opposite electrical activity to provide desired operational characteristics. For example, a PMOS field-effect transistor comprises an n-type substrate having p-type source and drain regions formed at its surface. The n-type activity in the substrate is provided by doping a layer of silicon with a donor (Group V) impurity such as arsenic or phosphorous. The source and drain p-type regions are then formed by diffusing an acceptor (Group III) impurity, most notably boron, into two predetermined regions of the substrate.
One physical property that is characteristic of all commonly-employed p-type impurities is that they have relatively high diffusion coefficients. In other words, during the diffusion process or subsequent annealing steps in the fabrication of an integrated circuit, p-type impurity atoms tend to move a relatively great distance in the silicon. Consequently, the transistor must be large enough in size to accommodate the relatively large volumes occupied by the p-type source and drain regions and yet provide the desired electrical activity.
Accordingly, it is desirable to provide a technique for limiting the diffusion depth of p-type dopants to thereby enable smaller integrated circuit devices to be fabricated. One possible way to achieve this objective is to reduce the concentration of impurity atoms that are employed in the p-type region. Such an approach would enable shallower source and drain regions to be formed, for example. However, this approach is not without attendant limitations. In particular, these shallower regions of lower concentration exhibit increased electrical resistance, which compromises the electrical performance characteristics of the transistor. For example, the transistor might operate slower than a similar transistor with deeper and more highly concentrated p-type regions.